Published: 11 January 2017
Tutorials on C/C++ coprocessing with HLS
IMPORTANT NOTE: Information and examples from the following two similar guides, both published on this site, should not be mixed, as they demonstrate different flows:
- Chapter 6 of the guide to Xillybus Block Design Flow for non-HDL users (pdf document): Shows how to integrate a Vivado's HLS project with a Xillybus bundle using the Block Design Flow.
- FPGA coprocessing for C/C++ programmers (web pages): Shows how to integrate a Vivado's HLS project with a Xillybus bundle with Verilog coding.
It's recommended to first choose the Verilog or Block Design flow, and pick the tutorial accordingly. Both cover quite the same topics. Reading both in parallel is likely to be rather confusing.
